View LTC1596AISWTRPBF_4296859.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ltc1595/ltc1596/ltc1596-1 serial 16-bit multiplying dacs features n so-8 package (ltc1595) n dnl and inl: 1lsb max n low glitch impulse: 1nv-s typ n fast settling to 1lsb: 2 m s (with lt1468) n pin compatible with industry standard 12-bit dacs: dac8043 and dac8143/ad7543 n 4-quadrant multiplication n low supply current: 10 m a max n power-on reset ltc1595/ltc1596: resets to zero scale ltc1596-1: resets to midscale n 3-wire spi and microwire tm compatible serial interface n daisy-chain serial output (ltc1596) n asynchronous clear input ltc1596: clears to zero scale ltc1596-1: clears to midscale descriptio n u the ltc ? 1595/ltc1596/ltc1596-1 are serial input, 16-bit multiplying current output dacs. the ltc1595 is pin and hardware compatible with the 12-bit dac8043 and comes in 8-pin pdip and so packages. the ltc1596 is pin and hardware compatible with the 12-bit dac8143/ad7543 and comes in 16-pin pdip and so wide packages. both are specified over the industrial temperature range. sensitivity of inl to op amp v os is reduced by five times compared to the industry standard 12-bit dacs, so most systems can be easily upgraded to true 16-bit resolution and linearity without requiring more precise op amps. these dacs include an internal deglitching circuit that reduces the glitch impulse by more than ten times to less than 1nv-s typ. the dacs have a clear input and a power-on reset. the ltc1595 and ltc1596 reset to zero scale. the ltc1596-1 is a version of the ltc1596 that resets to midscale. microwire is a trademark of national semiconductor corporation. , ltc and lt are registered trademarks of linear technology corporation. v dd v ref ltc1595 r fb gnd 4 7 6 5 8 5v v in clock data load clk sri ld 1 2 3 out1 33pf v out 1595/96 ta01 + lt 1468 digital input code 0 ?.0 integral nonlinearity (lsb) 0.6 0.8 0.4 0.4 0.6 0.8 1.0 0.2 0.2 0 16384 32768 1595/96 ta02 49152 65535 integral nonlinearity so-8 multiplying 16-bit dac has easy 3-wire serial interface applicatio n s u n process control and industrial automation n software controlled gain adjustment n digitally controlled filter and power supplies n automatic test equipment typical applicatio n u
2 ltc1595/ltc1596/ltc1596-1 absolute m axi m u m ratings w ww u v dd to agnd .............................................. C 0.5v to 7v v dd to dgnd .............................................. C 0.5v to 7v agnd to dgnd ............................................ v dd + 0.5v dgnd to agnd ............................................. v dd + 0.5v v ref to agnd, dgnd............................................. 25v r fb to agnd, dgnd .............................................. 25v digital inputs to dgnd ................ C 0.5v to (v dd + 0.5v) wu u package / o rder i for atio v out1 , v out2 to agnd ................. C 0.5v to (v dd + 0.5v) maximum junction temperature .......................... 150 c operating temperature range ltc1595c/ltc1596c/ltc1596-1c ........ 0 c to 70 c ltc1595i/ltc1596i/ltc1596-1i ...... C 40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c 1 2 3 4 5 6 7 8 top view sw package 16-lead plastic so wide n package 16-lead pdip 16 15 14 13 12 11 10 9 out1 out2 agnd stb1 ld1 sro sri stb2 r fb v ref v dd clr dgnd stb4 stb3 ld2 t jmax = 150 c, q ja = 100 c/w (n) t jmax = 150 c, q ja = 130 c/w (sw) order part number ltc1596-1ain ltc1596-1aisw ltc1596-1bin ltc1596-1bisw ltc1596-1cin ltc1596-1cisw ltc1596-1acn ltc1596-1acsw ltc1596-1bcn ltc1596-1bcsw ltc1596-1ccn ltc1596-1ccsw ltc1596ain ltc1596aisw ltc1596bin ltc1596bisw ltc1596cin ltc1596cisw ltc1596acn ltc1596acsw ltc1596bcn ltc1596bcsw ltc1596ccn ltc1596ccsw 1 2 3 4 top view s8 package 8-lead plastic so n8 package 8-lead pdip 8 7 6 5 v ref r fb out1 gnd v dd clk sri ld t jmax = 150 c, q ja = 130 c/w (n) t jmax = 150 c, q ja = 190 c/w (s) electrical characteristics v dd = 5v 10%, v ref = 10v, v out1 = v out2 = agnd = 0v, t a = t min to t max , unless otherwise noted. ltc1595ain8 ltc1595ais8 ltc1595bin8 ltc1595bis8 ltc1595cin8 ltc1595cis8 ltc1595acn8 ltc1595acs8 ltc1595bcn8 ltc1595bcs8 ltc1595ccn8 ltc1595ccs8 order part number s8 part marking 1595a 1595b 1595c 1595ai 1595bi 1595ci consult factory for military grade parts. ltc1595c/96c/96-1c ltc1595b/96b/96-1b ltc1595a/96a/96-1a (note 1) symbol parameter conditions min typ max min typ max min typ max units accuracy resolution l 16 16 16 bits monotonicity l 16 16 15 bits inl integral nonlinearity (note 2) t a = 25 c 0.25 1 2 4 lsb t min to t max l 0.35 1 2 4 lsb
3 ltc1595/ltc1596/ltc1596-1 electrical characteristics symbol parameter conditions min typ max min typ max min typ max units v dd = 5v 10%, v ref = 10v, v out1 = v out2 = agnd = 0v, t a = t min to t max , unless otherwise noted. symbol parameter conditions min typ max units gain temperature coefficient (note 4) d gain/ d temperature l 1 2 ppm/ c i leakage out1 leakage current (note 5) t a = 25 c 3na t min to t max l 15 na zero-scale error t a = 25 c 0.2 lsb t min to t max l 1 lsb psrr power supply rejection v dd = 5v 10% l 1 2 lsb/v reference input r ref v ref input resistance (note 6) l 5 7 10 k w ac performance output current settling time (notes 7, 8) 1 m s mid-scale glitch impulse using lt1122 op amp, c feedback = 33pf 1 nv-s digital-to-analog glitch impulse full-scale transition, v ref = 0v, 2 nv-s using lt1122 op amp, c feedback = 33pf multiplying feedthrough error v ref = 10v, 10khz sine wave 1 mv p-p thd total harmonic distortion (note 9) 108 db equivalent dac thermal noise (note 10) f = 1khz 11 nv/ ? hz voltage density analog outputs (note 4) c out output capacitance (note 4) dac register loaded to all 1s c out1 l 115 130 pf dac register loaded to all 0s c out1 l 70 80 pf digital inputs v ih digital input high voltage l 2.4 v v il digital input low voltage l 0.8 v i in digital input current l 0.001 1 m a c in digital input capacitance (note 4) v in = 0v l 8pf digital outputs: sro (ltc1596/ltc1596-1) v oh digital output high voltage i oh = 200 m a l 4v v ol digital output low voltage i ol = 1.6ma l 0.4 v symbol parameter conditions min typ max units timing characteristics (ltc1595) t ds serial input to clk setup time l 30 5 ns t dh serial input to clk hold time l 30 5 ns dnl differential t a = 25 c 0.2 1 1 2 lsb nonlinearity t min to t max l 0.2 1 1 2 lsb ge gain error (note 3) t a = 25 c2 16 16 32 lsb t min to t max l 3 16 32 32 lsb ltc1595c/96c/96-1c ltc1595b/96b/96-1b ltc1595a/96a/96-1a v dd = 5v 10%, v ref = 10v, v out1 = v out2 = agnd = 0v, t a = t min to t max , unless otherwise noted. v dd = 5v 10%, v ref = 10v, v out1 = gnd = 0v, t a = t min to t max , unless otherwise noted.
4 ltc1595/ltc1596/ltc1596-1 electrical characteristics v dd = 5v 10%, v ref = 10v, v out1 = v out2 = agnd = 0v, t a = t min to t max , unless otherwise noted. the l denotes specifications which apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: 1lsb = 0.0015% of full scale = 15.3ppm of full scale. note 3: using internal feedback resistor. note 4: guaranteed by design, not subject to test. note 5: i out1 with dac register loaded with all 0s. note 6: typical temperature coefficient is 100ppm/c. note 7: out1 load = 100 w in parallel with 13pf. symbol parameter conditions min typ max units t sri serial input data pulse width l 60 ns t ch clock pulse width high l 60 ns t cl clock pulse width low l 60 ns t ld load pulse width l 60 ns t asb lsb clocked into input register l 0ns to dac register load time symbol parameter conditions min typ max units timing characteristics (ltc1596/ltc1596-1) t ds1 serial input to strobe setup time stb1 used as the strobe l 30 5 ns t ds2 stb2 used as the strobe l 20 C 5 ns t ds3 stb3 used as the strobe l 25 0 ns t ds4 stb4 used as the strobe l 20 C 5 ns t dh1 serial input to strobe hold time stb1 used as the strobe l 30 5 ns t dh2 stb2 used as the strobe l 40 15 ns t dh3 stb3 used as the strobe l 35 10 ns t dh4 stb4 used as the strobe l 40 15 ns t sri serial input data pulse width l 60 ns t stb1 to strobe pulse width (note 11) l 60 ns t stb4 t stb1 to strobe pulse width (note 12) l 60 ns t stb4 t ld1, t ld2 ld pulse width l 60 ns t asb lsb strobed into input register l 0ns to load dac register time t clr clear pulse width l 100 ns t pd1 stb1 to sro propagation delay c l = 50pf l 30 150 ns t pd stb2, stb3, stb4 to sro c l = 50pf l 30 200 ns propagation delay power supply v dd supply voltage l 4.5 5 5.5 v i dd supply current digital inputs = 0v or v dd l 1.5 10 m a note 8: to 0.0015% for a full-scale change, measured from the falling edge of ld1, ld2 or ld. note 9: v ref = 6v rms at 1khz. dac register loaded with all 1s; op amp = lt1007. note 10: calculation from e n = ? 4ktrb where: k = boltzmann constant (j/ k); r = resistance ( w ); t = temperature ( k); b = bandwidth (hz). note 11: minimum high time for stb1, stb2, stb4. minimum low time for stb3. note 12: minimum low time for stb1, stb2, stb4. minimum high time for stb3.
5 ltc1595/ltc1596/ltc1596-1 typical perfor a ce characteristics uw time ( s) 01234 output voltage (mv) 0 1595/96 g01 ?0 +10 1nv-s typ using lt1122 op amp c feedback = 33pf v ref = 10v ld falling edge mid-scale glitch inpulse digital input code 0 1.0 differential nonlinearity (lsb) 0.8 0.4 0.2 0 1.0 0.4 16384 32768 1595/96 g03 0.6 0.6 0.8 0.2 49152 65535 integral nonlinearity (inl) differential nonlinearity (inl) differential nonlinearity vs reference voltage full-scale settling waveform dac output 5v/div gated settling waveform 500 m v/div 1 m s/div 1595/96 g04 reference voltage (v) ?0 differential nonlinearity (lsb) 0.5 6 1595/96 g06 0 ? ? 0 10 1.0 2 ? ? 8 4 integral nonlinearity vs reference voltage reference voltage (v) ?0 integral nonlinearity (lsb) 0.5 6 1595/96 g05 0 ? ? 0 10 1.0 2 ? ? 8 4 differential nonlinearity vs supply voltage multiplying mode frequency response vs digital code frequency (hz) 100 attenuation (db) ?0 ?0 ?0 0 1m 1595/96 g07 ?0 100 120 1k 10k 100k 10m d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 all bits off all bits on using lt1122 op amp c feedback = 33pf integral nonlinearity vs supply voltage supply voltage (v) 2 0 integral nonlinearity (lsb) 1 2 4 6 7 1595/96 g08 35 8 9 10 v ref = 10v v ref = 2.5v supply voltage (v) 2 0 differential nonlinearity (lsb) 0.5 1.0 4 6 7 1595/96 g09 35 8 9 10 using lt1122 op amp c feedback = 33pf digital input code 0 ?.0 integral nonlinearity (lsb) 0.6 0.8 0.4 0.4 0.6 0.8 1.0 0.2 0.2 0 16384 32768 1595/96 ta02 49152 65535
6 ltc1595/ltc1596/ltc1596-1 typical perfor a ce characteristics uw pi n fu n ctio n s uuu ltc1595 v ref (pin 1): reference input. r fb (pin 2): feedback resistor. normally tied to the output of the current to voltage converter op amp. out1 (pin 3): current output pin. tie to inverting input of current to voltage converter op amp. gnd (pin 4): ground pin. ld (pin 5): the serial interface load control input. when ld is pulled low, data is loaded from the shift register into the dac register, updating the dac output. sri (pin 6): the serial data input. data on the sri pin is latched into the shift register on the rising edge of the serial clock. data is loaded msb first. clk (pin 7): the serial interface clock input. v dd (pin 8): the positive supply input. 4.5v v dd 5.5v. requires a bypass capacitor to ground. ltc1596/ltc1596-1 out1 (pin 1): true current output pin. tie to inverting input of current to voltage converter op amp. out2 (pin 2): complement current output pin. tie to analog ground. agnd (pin 3): analog ground pin. stb1, stb2, stb3, stb4 (pins 4, 8, 10, 11): serial interface clock inputs. stb1, stb2 and stb4 are rising edge triggered inputs. stb3 is a falling edge triggered input (see truth tables). ld1, ld2 (pins 5, 9): serial interface load control inputs. when ld1 and ld2 are pulled low, data is loaded from the shift register into the dac register, updating the dac output (see truth tables). sro (pin 6): the output of the shift register. becomes valid on the active edge of the serial clock. sri (pin 7): the serial data input. data on the sri pin is latched into the shift register on the active edge of the serial clock. data is loaded msb first. dgnd (pin 12): digital ground pin. clr (pin 13): the clear pin for the dac. clears dac to zero scale when pulled low on ltc1596. clears dac to midscale when pulled low on ltc1596-1. this pin should be tied to v dd for normal operation. v dd (pin 14): the positive supply input. 4.5v v dd 5.5v. requires a bypass capacitor to ground. v ref (pin 15): reference input. r fb (pin 16): feedback resistor. normally tied to the output of the current to voltage converter op amp. supply current vs logic input voltage input voltage (v) 0 supply current (ma) 0.6 0.8 1.0 4 1595/96 g10 0.4 0.2 0.5 0.7 0.9 0.3 0.1 0 1 2 3 5 v dd = 5v logic threshold vs supply voltage supply voltage (v) 0 logic threshold (v) 1.0 2.0 3.0 0.5 1.5 2.5 1595/96 g11 10 05 16 27 38 49
7 ltc1595/ltc1596/ltc1596-1 sri ld previous word d15 msb d14 d1 1595 td d0 lsb t ds t dh t ch t sri t asb t cl t ld clk input truth tables table 1. ltc1596/ltc1596-1 input register control inputs stb1 stb2 stb3 stb4 input register and sro operation 0 1 0 serial data bit on sri loaded into input 0 1 0 register, msb first 0 0 0 data bit or sri appears on sro pin 0 0 1 after 16 clocked bits 1 x x x no input register operation x 1 x x no sro operation xx0x xxx1 table 2. ltc1596/ltc1596-1 dac register control inputs clr ld1 ld2 dac register operation 0 x x reset dac register and input register to all 0s (ltc1596) or to midscale (ltc1596-1) (asynchronous operation) 1 1 x no dac register operation 1x1 1 0 0 load dac register with the contents of input register ti i g diagra u w w (ltc1595) 112k 7k 112k 56k 112k 56k 112k 56k 56k 56k decoder d15 (msb) d13 d14 d12 d11 d0 (lsb) clk in load v dd v ref r fb out1 gnd sri 6 1595 bd dac register 56k 56k 56k 56k input 16-bit shift register 5 8 1 ld 7 clk 4 3 2 ? block diagra w (ltc1595)
8 ltc1595/ltc1596/ltc1596-1 block diagra w (ltc1596/ltc1596-1) 112k 7k 112k 56k 112k 56k 112k 56k 56k 56k decoder d15 (msb) d13 d14 d12 d11 d0 (lsb) clr clk out clr sro in load dgnd v dd v ref r fb out1 out2 sri 7 agnd 1596 bd dac register 56k 56k 56k 56k input 16-bit shift register 9 8 10 12 11 4 6 5 13 14 15 stb1 stb2 stb3 stb4 ld1 clr ld2 3 2 1 16 ? ti i g diagra u w w (ltc1596/ltc1596-1) d15 msb d14 d13 d1 t ds1 t ds2 t ds3 t ds4 t dh1 t dh2 t dh3 t dh4 t stb1 t stb2 t stb3 t stb4 t stb1 t stb2 t stb3 t stb4 t asb t ld1 t ld2 t sri d0 lsb t pd t pd1 strobe input stb1, stb2, stb4 (invert for stb3) sri sro ld1, ld2 1596 td d15 (msb) previous word d14 previous word d0 (lsb) previous word d15 (msb) current word d13 previous word
9 ltc1595/ltc1596/ltc1596-1 description the ltc1595/ltc1596 are 16-bit multiplying dacs which have serial inputs and current outputs. they use precision r/2r technology to provide exceptional linearity and stability. the devices operate from a single 5v supply and provide 10v reference input and voltage output ranges when used with an external op amp. these devices have a proprietary deglitcher that reduces glitch impulse to 1nv-s over a 0v to 10v output range. serial i/o the ltc1595/ltc1596 have spi/microwire compat- ible serial ports that accept 16-bit serial words. data is accepted msb first and loaded with a load pin. the 8-pin ltc1595 has a 3-wire interface. data is shifted into the sri data input on the rising edge of the clk pin. at the end of the data transfer, data is loaded into the dac register by pulling the ld pin low (see ltc1595 timing diagram). applicatio n s i n for m atio n wu u u the 16-pin ltc1596 can operate in identical fashion to the ltc1595 but offers additional pins for flexibility. four clock pins are available stb1, stb2, stb3 and stb4. stb1, stb2 and stb4 operate like the clk pin of the ltc1595, capturing data on their rising edges. stb3 captures data on its falling edge (see truth table 1). the ltc1596 has two load pins, ld1 and ld2. to load data, both pins must be taken low. if one of the pins is grounded, the other pin will operate identically to ltc1595s ld pin. an asynchronous clear input (clr) resets the ltc1596 to zero scale (and the ltc1596-1 to midscale) when pulled low (see truth table 2). the ltc1596 also has a data output pin sro that can be connected to the sri input of another dac to daisy-chain multiple dacs on one 3-wire interface (see ltc1596 timing diagram). unipolar (2-quadrant multiplying) mode (v out = 0v to Cv ref ) the ltc1595/ltc1596 can be used with a single op amp to provide 2-quadrant multiplying operation as shown in figure 1. with a fixed C10v reference, the circuits shown give a precision unipolar 0v to 10v output swing. figure 1. unipolar operation (2-quadrant multiplication) v out = 0v to C v ref table 1. unipolar binary code table digital input binary number in dac register ? ref (65,535/65,536) ? ref (32,768/65,536) = v ref /2 ? ref (1/65,536) 0v lsb 1111 1111 1111 0000 0000 0000 0000 0000 0001 0000 0000 0000 analog output v out msb 1111 1000 0000 0000 (b) v dd v ref ltc1595 r fb gnd 4 7 6 5 8 5v v ref ?0v to 10v clk sri ld 1 2 3 out1 33pf v out 0v to v ref 1595/96 f01b + lt1001 p 0.1 f (a) v dd v ref ltc1596 r fb agnd dgnd 3 12 10 4 7 5 6 9 8 11 2 14 13 5v v ref ?0v to 10v to next dac for daisy-chaining 15 16 1 out1 33pf 0.1 m f v out 0v to v ref 1595/96 f01a out2 + lt1001 clr stb3 stb1 sri ld1 sro ld2 stb2 stb4 m p
10 ltc1595/ltc1596/ltc1596-1 bipolar (4-quadrant multiplying) mode (v out = C v ref to v ref ) the ltc1595/ltc1596 can be used with a dual op amp and three external resistors to provide 4-quadrant multi- plying operation as shown in figure 2 (last page). with a fixed 10v reference, the circuits shown give a precision bipolar C10v to 10v output swing. using the ltc1596-1 will cause the power-on reset and clear pin to reset the dac to midscale (bipolar zero). op amp selection because of the extremely high accuracy of the 16-bit ltc1595/ltc1596, thought should be given to op amp selection in order to achieve the exceptional performance of which the part is capable. fortunately, the sensitivity of inl and dnl to op amp offset has been greatly reduced compared to previous generations of multiplying dacs. op amp offset will contribute mostly to output offset and gain and will have minimal effect on inl and dnl. for example, a 500 m v op amp offset will cause about 0.55lsb applicatio n s i n for m atio n wu u u inl degradation and 0.15lsb dnl degradation with a 10v full-scale range. the main effects of op amp offset will be a degradation of zero-scale error equal to the op amp offset, and a degradation of full-scale error equal to twice the op amp offset. for example, the same 500 m v op amp offset will cause a 3.3lsb zero-scale error and a 6.5lsb full-scale error with a 10v full-scale range. op amp input bias current (i bias ) contributes only a zero- scale error equal to i bias (r fb ) = i bias (r ref ) = i bias (7k). table 2 shows a selection of ltc op amps which are suitable for use with the ltc1595/ltc1596. for a thor- ough discussion of 16-bit dac settling time and op amp selection, refer to application note 74, component and measurement advances ensure 16-bit dac settling time. grounding as with any high resolution converter, clean grounding is important. a low impedance analog ground plane and star grounding should be used. i out2 (ltc1596) and gnd (ltc1595) must be tied to the star ground with as low a resistance as possible. table 2. 16-bit settling time for various amplifiers driven by the lt1595 dac. lt1468 (shaded) offers fastest settling time while maintaining accuracy over temperature conservative settling time amplifier and compensation value comments lt1001 120 m s 100pf good low speed choice lt1007 19 m s 100pf i b gives ? 1lsb error at 25 c lt1013 75 m s 150pf ? 1lsb error due to v os over temperature lt1077 200 m s 100pf lt1097 120 m s 75pf good low speed choice lt1112 120 m s 100pf good low speed choice dual lt1178 450 m s 100pf low power dual lt1468 2.5 m s 30pf fastest settling with 16-bit performance
11 ltc1595/ltc1596/ltc1596-1 dimensions in inches (millimeters) unless otherwise noted. package descriptio n u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n8 1197 0.100 0.010 (2.540 0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** sw package 16-lead plastic small outline (wide 0.300) (ltc dwg # 05-08-1620) n package 16-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n16 1197 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0.020 (0.508) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s16 (wide) 0396 note 1 0.398 ?0.413* (10.109 ?10.490) 16 15 14 13 12 11 10 9 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) typ 0.014 ?0.019 (0.356 ?0.482) typ 0 ?8 typ note 1 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299** (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
12 ltc1595/ltc1596/ltc1596-1 ? linear technology corporation 1997 159561fa lt/tp 0299 2k rev a ? printed in usa typical applicatio n s u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts figure 2. bipolar operation (4-quadrant multiplication) v out = C v ref to v ref v dd v ref ltc1596-1 r fb agnd dgnd 3 12 10 4 7 5 6 9 8 11 2 14 13 5v v ref ?0v to 10v to next dac for daisy-chaining 15 16 1 out1 33pf r1 10k (20k 2) r2 20k r3 20k 0.1 m f v out ? ref to v ref resistors: caddock t914-20k-010-02 (or equivalent) 20k, 0.01%, tc track = 2ppm/ c 1595/96 f02a out2 + 1/2 lt1112 clr stb3 stb1 sri ld1 sro ld2 stb2 stb4 m p + 1/2 lt1112 (a) 7 6 5 5v p 0.1 f v dd v ref ltc1595 r fb gnd 4 8 v ref ?0v to 10v clk sri ld 1 2 3 out1 v out ? ref to v ref 1595/96 f02b + 1/2 lt1112 r3 20k r1 10k (20k 2) r2 20k + 1/2 lt1112 33pf (b) table 3. bipolar offset binary code table digital input binary number in dac register v ref (32,767/32,768) v ref (1/32,768) 0v ? ref (1/32,768) ? ref lsb 1111 1111 1111 0000 0000 0001 0000 0000 0000 1111 1111 1111 0000 0000 0000 analog output v out msb 1111 1000 1000 0111 0000 part number description comments dacs ltc1590 dual serial i/o multiplying i out 12-bit dac 16-pin so and pdip, spi interface ltc1597 parallel 16-bit current output dac low glitch, 1lsb maximum inl, dnl ltc1650 serial 16-bit voltage output dac low noise and glitch rail-to-rail v out ltc1658 serial 14-bit voltage output dac low power, 8-lead msop rail-to-rail v out ltc7543/ltc8143/ltc8043 serial i/o multiplying i out 12-bit dacs clear pin and serial data output (ltc8143) adcs ltc1418 14-bit, 200ksps 5v sampling adc 16mw dissipation, serial and parallel outputs ltc1604 16-bit, 333ksps sampling adc 2.5v input, sinad = 90db, thd = 100db ltc1605 single 5v, 16-bit 100ksps adc low power, 10v inputs ltc2400 24-bit, d? adc in so-8 1ppm (4ppm) offset (full scale), internal 50hz/60hz notches op amps lt1001 precision operational amplifier low offset, low drift lt1112 dual low power, precision picoamp input op amp low offset, low drift lt1468 90mhz, 22v/ m s, 16-bit accurate op amp precise, 1 m s settling to 0.0015% references lt1236 precision reference ultralow drift, 5ppm/ c, high accuracy 0.05% lt1634 micropower reference ultralow drift, 10ppm/ c, high accuracy 0.05%

▲Up To Search▲

Price & Availability of LTC1596AISWTRPBF

	To Download LTC1596AISWTRPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .